A Tool
for Converting
Tareq
Hasan Khan, Ali Habibi, Sofične Tahar, Otmane Ait Mohamed
ABSTRACT
Finite state machines (FSM) are a basic component in hardware design, they represent the transformation between inputs and
outputs for sequential designs. An FSM can be represented graphically, which
would help the designer to visualize and design in a more efficient way, on the
other hand the designer requires a fast direct way to convert the visualized
design to hardware description languages (HDL) code directly in order to
simulate and implement it for synthesis and analysis. In this report, we
present a tool which starting from a graphical FSM representation produces
SystemC code which can be used for analysis and simulation
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