Design for Verification of the PCI-X Standard Bus using AsmL/SystemC



  • Haja Moinudeen
  • Ali Habibi
  • Dr. Sofiene Tahar


SystemC is a new system level language in the arena of embedded system design and verification. The SystemC library of classes and simulation kernel extend C++ to enable the modeling of System-on-Chip (SoC). The extensions include support for concurrent behavior, data types to model hardware and software, structure hierarchy and simulation. In order for SystemC to model complex yet real SoC, it must be equipped by a library of Intellectual Properties (IP) including in particular bus structures that are used to connect devices such as processors, memories etc. The verification of SystemC design is a serious bottleneck due to the inability of conventional simulation to guarantee the absence of design errors and the non-existence of model checkers that support object-oriented languages. To overcome these problems, Habibi et al [1] presented a methodology (See Figure Below) to verify SystemC designs using an intermediate level in the design flow, where the system is modeled in Abstract State Machine Language (AsmL), an ASM based language. This project aims to demonstrate the merit of the above methodology by having a complex case-study such as PCI-X standard bus. PCI-X is the latest implementation of PCI. It was adopted as industrial standard ratified by the PCI-SIG. Using the same 64-bit architecture as the current standard, PCI-X has tremendously increased the clock speed to 533 MHz, allowing transfer speeds up to 4 GB/sec and it is backward compatible with standard PCI cards. Furthermore, the PCI-X bus plays a vital role in today's System-On-Chip (SoC) designs involving various components connected using high-speed standard buses. The general architecture of PCI-X is shown below. In our approach, we start with an informal specification of PCI-X given by PCI-SIG, developed in UML (Class diagrams and Sequence Diagrams). Then, we drive an ASM model, which will enable the verification of the design using model checkers. We also specify the properties of the PCI-X bus using PSL in ASM level. If the verification is successful, we translate the AsmL code into SystemC and if otherwise, we go back to UML specification, update it and redo the verification at the ASM level.




  1. A. Habibi and S. Tahar: Design for Verification of SystemC Transaction Level Models ; Proc. IEEE/ACM Design Automation and Test in Europe (DATE'05), Munich, Germany, March 2005.
  2. H. Moinudeen, A. Habibi, and S. Tahar: An Executable Specification of the PCI-X Bus Standard in AsmL; Proc. IEEE Canadian Conference on Electrical & Computer Engineering (CCECE'05), Saskatoon, Saskatchewan, Canada, May 2005.

Concordia University