HVG
Hardware Verification Group
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Current Projects:
Formal Verification of Physical Systems
Active Projects
Formalization of Partial Differential Equations
Formalization of Network Topology Matrices
Formal Verification of Transportation Systems
Completed Projects
Formal Analysis of Traffic Conflicts Severity Using Keymaera.
Formal Verification & Artificial Intelligence
Active Projects
Proof Recommendation for the HOL4 Theorem Prover.
Efficient Explainable AI and Adversarial Robustness using Formal Methods.
Formal Reliability Analysis
Active Projects
Formal Probabilistic Risk Assessment using Theorem Proving
Completed Projects
Formal Dynamic Dependability Analysis
Formal Reliability Analysis using Theorem Proving
Approximate Computing
Active Projects
Machine Learning based Memory Load Approximation
Completed Projects
On the Improving of Approximate Computing Quality Assurance
Adaptive Approximate Computing for Enhanced Quality Assurance