In this paper we display several practical approaches adopted for the formal verification of an industrial case study using model checking. The device under investigation is the Routing Control, Monitoring and Policing 800 Mbps (RCMP-800), a product from PMC-Sierra, Inc. RCMP-800 is an integrated circuit that implements ATM (Asynchronous Transfer Mode) layer functions including fault and performance monitoring, header translation and cell rate policing. In particular, we present our experience on model checking of the input FIFO of RCMP-800 using the VIS tool. We successfully established the environments and verified a number of relevant properties in the input process module of RCMP-800, which led to the discovery of a few errors.
|Download postscript file (PS File)|
|Download PDF file (PDF File)|
|Download source codes (Verilog-files.tar.gz).|
|Send comments and suggestions to: email@example.com|