Generation of Reduced Analog Circuit Models using Transient Simulation Traces
Paul Winkler, Henda aridhi,
Mohammed Zaki Hussein and
Sofiene Tahar
Contact:
h_aridh@ece.concordia.ca
The generation of fast models for device level circuit descriptions is a very active area of research. Model order reduction is an attractive technique for dynamical models size reduction. In this project, we propose an approach based on clustering, curve-fitting,
linearization and Krylov space projection to build reduced models for nonlinear analog circuits. We demonstrate our model order reduction method for three nonlinear
circuits: a voltage controlled oscillator, an operational amplifier and a digital frequency divider. Our experimental results show that the reduced models lead to an improvement in simulation speed while guaranteeing the representation of the behavior of the original circuit design.
Publications
Master Thesis
- P. Winkler :Automated Generation of Reduced Analog Circuit Models Using SPICE Simulation Traces; MASc Thesis, University of Applied Science, faculty of Electronics and Information Techniques, Leipzig, Germany, Department of Electrical and Computer Engineering, Concordia University, Montreal, Quebec, Canada, December 2013.
